An Input-buffer Embedding Dual-residue Pipelined-SAR ADC with Nonbinary Capacitive Interpolation
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)(2021)
摘要
Pipelined-SAR ADCs have proved their capability in achieving high-speed and high-resolution with excellent energy-efficiency. The well-known design burden of residue amplifier (RA) such as power-hungry opamp or calibration complexity for inaccurate open-loop amplifier could be eliminated by the single-amplifier dual-residue pipelined architecture which requires neither accurate gain nor gain match...
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关键词
Interpolation,Power demand,Conferences,Capacitors,Energy efficiency,Solid state circuits,Complexity theory
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