A 1.92-Gs/S Ct Delta Sigma Modulator With 70-Db Dr And 78-Db Sfdr In 15-Mhz Bandwidth

This paper describes the implementation and measurement results of a 1.92 GS/s continuous-time (CT) low-pass Delta Sigma Smodulator for a high frequency (>10 GHz) multifunctional receiver. The proposed single-loop 3rd-order modulator operates at 1.92 GHz, taking advantage of the high transit frequency (fT) of a low-cost 0.25 mu m SiGe BiCMOS process. In order to achieve high linearity, single-bit quantization is employed, which is inherently linear and no digital DAC linearity enhancement technique is required. The experimental prototype chip achieves a dynamic range of 70 dB and a spurious-free dynamic range (SFDR) of 78.1 dB for a signal bandwidth of 15 MHz. It dissipates 220 mW and occupies 0.4 mm(2) silicon area.