Invited: Getting the Most out of your Circuits with Heterogeneous Logic Synthesis

2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC)(2021)

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摘要
High Level Synthesis (HLS) speeds hardware development and opens the door to non-expert designers, focusing on functionality rather than implementation. The expense and rigidity of commercial electronic design automation (EDA) tool chains can be an obstacle for these users. LSOracle is an opensource logic synthesis tool which leverages multiple underlying data structures, including and -inverter graphs (AIGs), majority-inverter graphs (MIGs), and xor-and graphs (XAGs) to automatically optimize circuits using the best representation for each region of a design, without manual intervention. The use of MIGs and XAGs gives particularly strong performance in arithmetic logic, cryptography cores, and machine-learning accelerators; applications which may be of particular interest for HLS users. Here we present an overview of the approach and demonstrate an open-source HLS-to-GDS II workflow using LSOracle, Bambu, and OpenROAD. We test the integration on a small benchmark suite and show a reduction in delay of up to 31%.
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关键词
xor-and graphs,heterogeneous logic synthesis,electronic design automation tool-chains,open source logic synthesis tool,open-source HLS-to-GDS II workflow,HLS users,machine-learning accelerators,arithmetic logic,particularly strong performance,XAG,MIG,majority-inverter graphs,and-inverter graphs,multiple underlying data structures,LSOracle,EDA,hardware development,high level synthesis
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