A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS

IEEE Transactions on Circuits and Systems I: Regular Papers(2021)

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摘要
In this article, we introduce a fractional-N all-digital phase-locked loop (ADPLL) architecture based on a single LC-tank, featuring an ultra-wide tuning range (TR) and optimized for ultra-low area in 10-nm FinFET CMOS. Underpinned by excellent switches in the FinFET technology, a high turn-on/off capacitance ratio of LC-tank switched capacitors, in addition to an adjustable magnetic coupling tech...
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关键词
Tuning,Oscillators,Inductors,Couplings,Clocks,Q-factor,Phase locked loops
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