Nanoscale Three-Independent-Gate Transistors: Geometric TCAD Simulations at the 10 nm-Node

Three-Independent-Gate Field-Effect Transistors (TIGFETs) are Schottky-barrier-based devices which can be reconfigured to be either n- or p-type allowing for innovative compact logic gate implementations. In this paper, we present an aggressively scaled 10 nm gate-all-around silicon-nanowire TIGFET device evaluated with Synopsys Sentaurus at a 0.7 V nominal supply voltage as typically used at this technology node. When considering a pure silicon channel, the maximum TCAD simulated current drive is 90.20 μA/μm and 89.25 μA/μm for n- and p-type operation respectively, and these simulations are verified using device physics calculations. In order to achieve higher current drives, we also consider a germanium-nanowire device which results in current drives more than 14× higher compared to the silicon-nanowire devices, thus making TIGFET devices competitive with FinFET technology at the 10 nm node.