56Gbps PAM4 SerDes Link Parameter Optimization for Improved Post-FEC BER

For 56G, as well as 112G, PAM4 systems, it is no longer feasible to rely on SerDes equalization alone to achieve the desired BER performance. FEC (forward error correction) becomes mandatory to enhance the SerDes to achieve the post-FEC BER target (e.g., 1E-15). The key takeaway from this paper is that the optimized SerDes equalization settings, particularly the TX settings, i.e., FIR and swing, could be rather different with and without FEC. It is shown that lower pre-FEC BER does not necessarily imply lower post-FEC BER.