Incorporation of a bipolar incremental step pulse programming with thermal forming to reduce the forming voltage in 1T1R structure resistance random access memory

In this work, we have systematically compared different factors of the bipolar incremental step pulse programming (ISPP) method in a one-transistor-one-resistor (1T1R) structure to lower the forming bias of RRAM, and also investigated the limitation of the forming voltage induced by the gate voltage of the transistor. Finally, we applied bipolar ISPP at high temperatures to further reduce the forming voltage. The experimental results show that the forming voltage has effectively been reduced without additional degradation to device performance according to reliability tests. This provides a feasible method to consider the issues of the reduction of the forming voltage.