Variable-Weight Block Dual-Diagonal Structure For Low-Rate Qc Ldpc Codes With Low Error Floors

IEEE Transactions on Communications(2020)

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摘要
Irregular quasi-cyclic (QC) low-density parity-check (LDPC) codes with the block dual-diagonal (BDD) parity structure are widely adopted in many communication standards because the BDD structure supports an efficient encoding and many degree-2 variable nodes inside are adequate for the construction of mid- to high-rate codes. However, we observe that low-rate irregular QC LDPC codes with the BDD parity structure inherently contain too many degree-2 variable nodes and suffer from error floors in high signal-to-noise ratio (SNR) region. In this paper, a generalized BDD structure including double-weight circulants as well as circulant permutation matrices is proposed for low-rate irregular QC LDPC codes with low error floors which is achieved with a little bit giving up error performance in the waterfall region. When constructing the parity part of a code with the generalized BDD structure, the portion of double-weight circulants is variable so that the resulting LDPC code can achieve a desired degree distribution including degrees 2 and 3 while supporting the efficient encoding. We show that low-rate QC LDPC codes constructed with the proposed BDD structure have better theoretical properties and lower error floor than those with the conventional BDD structure.
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关键词
Parity check codes,Encoding,Hamming distance,Indexes,Electronic mail,Signal to noise ratio,Upper bound,Block dual-diagonal (BDD) structure,circulant matrices,efficient encoding,error floor,girth,minimum Hamming distance,protograph,quasi-cyclic (QC) low-density parity-check (LDPC) codes
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