Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(2020)

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摘要
Clock power, skew and maximum latency are three key metrics for clock distribution in low-power and high-performance designs. An H-tree offers minimum clock skew and good robustness against variations, but at the cost of large wirelength and clock power. On the other hand, a “fishbone” clock network with spine-ribs structures has smaller wirelength, latency and clock power, but larger skew, as com...
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关键词
Clocks,Topology,Tools,Clustering algorithms,Optimization,Robustness,Timing
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