Massively Parallel Microwire Arrays Integrated with CMOS chips for Neural Recording

bioRxiv(2019)

引用 91|浏览74
暂无评分
摘要
Multiple-channel count neural recordings of brain activity are a powerful technique that is increasingly uncovering new aspects of neural communication, computation, and prosthetic interfaces. However, while silicon CMOS devices continue to scale rapidly in number and power in planar geometries, this scaling has not been followed for large-scale mapping along three dimensions. Here, we present a new strategy to interface CMOS-based devices with a three-dimensional microwire array, providing the link between rapidly-developing electronics, and high density neural interfaces. The system consists of a bundle of insulated and spaced microwires perpendicularly mated to a commercial large-scale CMOS microelectrode array, such as a camera chip. The modular nature of the design enables a variety of microwire types and sizes to be integrated with different types of silicon-based arrays, allowing channel counts to be scaled from a few dozen to thousands of electrodes using the same fundamental platform. This system has excellent recording performance, demonstrated via single unit and local-field potential recordings in isolated retina, and in the motor cortex and striatum of awake moving mice. This concept links the rapid progress and power of commercial multiplexing, digitisation and data acquisition hardware together with a three-dimensional neural interface.
更多
查看译文
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要