Bounded invariance checking of simulink models.

SAC(2019)

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摘要
Currently, Simulink models can be verified rigorously against design errors or statistical properties. In this paper, we show how Simulink models can be formally analyzed for invariance properties using bounded model-checking reduced to satisfiability modulo theories solving. In its basic form, the technique provides means for rigurous verification of an underlying model over bounded traces, however, in general the procedure is incomplete. We identify common Simulink block types and compositions by analyzing selected industrial models, and we show that for some of them the set of non-repeating states (reachability diameter) can be visited with a finite set of paths of finite length, yielding the verification complete. We complement our approach with a tool, called SyMC that automates the following: i) calculation of the reachability diameter size for some of the designs, ii) generation of finite (bounded) paths of the underlying Simulink model and their encoding into SMT-LIB format, and iii) checking invariance properties using the Z3 SMT solver. To show the applicability of our approach, we formally analyze the Simulink model of a prototype industrial system, namely the Brake-by-Wire system from Volvo Group Trucks Technology, Sweden.
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关键词
bounded invariance checking, formal verification, simulink
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