Characterizing Performance and Cache Impacts of Code Multi-versioning on Multicore Architectures

2017 25th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP)(2017)

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摘要
Code multi-versioning is an increasingly widely adopted tool for implementing optimizations which respond to unknown or dynamically changing runtime conditions, without the performance overhead of just-in-time compilation. A common concern in its use is instruction cache performance, due to larger binary sizes increasing cache pressure on the one hand and more unpredictable branching on the other. Despite this ongoing interest, there has been no comprehensive study of the impact of multi-versioning so far - particularly in a multi-threaded setting. In this paper, we present a categorization of the parameter space potentially affecting multi-versioned performance, a toolset for exploring this space, and an in-depth characterization of three hardware platforms using this toolset.
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关键词
multi-versioning,instruction cache,binary generation,code size,dynamic optimization
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