A 2D imager for X-ray FELs with a 65 nm CMOS readout based on per-pixel signal compression and 10 bit A/D conversion

A readout channel for applications to X-ray diffraction imaging at free electron lasers has been developed in a 65nm CMOS technology. The analog front-end circuit can achieve an input dynamic range of 100dB by leveraging a novel signal compression technique based on the non-linear features of MOS capacitors. Trapezoidal shaping is accomplished through a transconductor and a switched capacitor circuit, performing gated integration and correlated double sampling. A small area, low power 10bit successive approximation register (SAR) ADC, operated in a time-interleaved fashion, is used for numerical conversion of the amplitude measurement. Operation at 5MHz of the analog channel including the shaper was demonstrated. Also, the channel was found to be compliant with single 1keV photon resolution at 1.25MHz. The ADC provides a signal-to-noise ratio (SNR) of 56dB, corresponding to an equivalent number of bits (ENOB) of 9bits, and a differential non linearity DNL<1 LSB at a sampling rate slightly larger than 1.8MHz.