Fully FPGA Based Performance Enhanced DMPC for Grid-Tied AFE With Multiple Predictions and Reduced Computational Efforts

Direct Model Predictive Control (DMPC) is an attractive control method for power electronics and drives, characterized by straightforward concept, nice dynamics and great flexibility. However, relatively big ripples of the control variables and heavy computational efforts are regarded as two of the shortcomings. To cope with these, this work proposes a performance-enhanced DMPC concept with multi-predictions and lower computational efforts. The novelty of the proposed scheme is two-folds: i) By dividing each sampling interval into 3 prediction periods, the resolution of the control accuracy is therefore improved compared with the classical DMPC schemes with the same sampling period; ii) Instead of using the exhausting enumeration concept, a deadbeat notion is in-cooperated to find the equivalently optimal vectors and much lower computational efforts are therefore required. As a case of study it is here verified on a grid-tied two level Active-Front-End (AFE) and is realized using an entirely FPGA based solution. Compared with the classical DMPC schemes, better current/power qualities are achieved with the same sampling frequency. The effectiveness of the proposed scheme is emphasized with experimental results.