Triple material double gate TFET with optimized si film thickness

Triple material double gate (TMDG) tunnel field-effect transistor (TFET) can be considered as a potential nominee for next generation low power high speed device fabrication. In this study, the effect of Si film thickness on performance of TMDG TFET is analyzed using two dimensional TCAD simulations. The tunneling current is substantially dependent on device thickness and the device physics regulating it is outlined. Potential and electric field distributions along film thickness reveal that double gate pairing in TMDG TFET structure can lower the tunneling barrier width at the middle of the device until an optimized silicon film thickness is achieved and provide maximum drain current.