Manufacturability Of Dense Hole Arrays With Directed Self-Assembly Using The Chips Flow

Directed self-assembly (DSA) of block copolymers (BCP) has attracted significant interest as a patterning technique over the past few years. We have previously reported the development of a new process flow, the CHIPS flow (Chemo-epitaxy Induced by Pillar Structures), where we use ArFi lithography and plasma etch to print guiding pillar patterns for the DSA of cylindrical phase BCPs into dense hexagonal hole arrays of 22.5 nm half-pitch and 15 nm half-pitch [ 1]. The ability of this DSA process to generate dense regular patterns makes it an excellent candidate for patterning memory devices. Thus, in this paper we study the applicability of the CHIPS flow to patterning for DRAM storage layers. We report the impact of various process conditions on defect density, defect types and pattern variability. We also perform detailed analysis of the DSA patterns, quantify pattern placement accuracy and demonstrate a route towards excellent LCDU after pattern transfer into a hard mask layer.