Twiddle Factor Complexity Analysis of Radix-2 FFT Algorithms for Pipelined Architectures

2017 FIFTY-FIRST ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS, AND COMPUTERS（2017）

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摘要

This paper presents analysis of fast Fourier transform (FFT) algorithms for pipelined architectures that can be generated by using binary tree representation. Those algorithms have different twiddle factors, however the butterfly operations remain same. Twiddle factor can be implemented by different techniques, which has different hardware cost. This analysis is based on twiddle factors hardware cost of each FFT algorithm. In results, we have shown the trade-off between the hardware components of twiddle factor for selected FFT algorithms.

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关键词

twiddle factor complexity analysis,Radix-2 FFT algorithms,pipelined architectures,binary tree representation,butterfly operations,different techniques,different hardware cost,twiddle factors hardware cost,fast Fourier transform algorithms

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