An Intrusive Dynamic Reconfigurable Cycle-Accurate Debugging System for Embedded Processors.

ARC(2018)

引用 26|浏览17
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摘要
This paper presents a dynamic partial reconfigurable debugging system for embedded processors based upon a device start and stop (DSAS) approach [1]. Using this approach, a cycle-accurate debugging system can be dynamically configured to any embedded processor-based design at runtime. The debugging system offers lossless debugging because the design is stopped during data transfer to prevent the loss of data. The data can be transferred by any available data communication interface such as Ethernet or UART and can be viewed by open-source waveform viewers. The technique offers debugging without the need to re-synthesize the design by using the dynamic partial reconfiguration.
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关键词
FPGA, Debugging, Simulation, Device start and stop, DSAS, Device under test, Dynamic partial reconfiguration
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