A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI.

Babak Mohammadi,Oskar Andersson,Joseph Nguyen,Lorenzo Ciampolini,Andreia Cathelin,Joachim Neves Rodrigues

IEEE Transactions on Circuits and Systems I: Regular Papers（2018）

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摘要

A 128-kb ultra-low voltage SRAM, based on a leakage optimized single-WELL 7T bitcell in 28-nm FD-SOI technology is presented. An ideal power management scenario in a single supply system is achieved by permanently keeping the storage elements in the vicinity of the retention voltage. Performance and reliability is regained by boosting the voltage on critical nodes. The cost of voltage boost genera...

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关键词

Transistors,Random access memory,Boosting,Integrated circuit reliability,Memory architecture,System-on-chip

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