Using Hardware-Transactional-Memory Support to Implement Thread-Level Speculation.

Juan Salamanca,José Nelson Amaral,Guido Araujo

IEEE Transactions on Parallel and Distributed Systems（2018）

引用 23|浏览23

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摘要

This paper presents a detailed analysis of the application of Hardware Transactional Memory (HTM) support for loop parallelization with Thread-Level Speculation (TLS) and describes a careful evaluation of the implementation of TLS on the HTM extensions available in such machines. The sample implementation of TLS over HTM described in this paper also provides evidence that the programming effort to...

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关键词

Hardware,Instruction sets,Strips,Benchmark testing,Runtime,Feature extraction,Programming

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