16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology.

Siddharth Devarajan,Larry Singer,Dan Kelly,Steve Kosic,Tao Pan,José B. Silva,Janet Brunsilius,Daniel Rey-Losada,Frank Murden,Carroll Speir,Jeff Bray,Eric Otte,Nevena Rakuljic,Phil Brown,Todd Weigandt,Qicheng Yu,Donald Paterson,Corey Petersen,Jeffrey C. Gealow

ISSCC（2017）

引用 124|浏览41

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摘要

Software defined radios and wideband instrumentation demand the ability to digitize wide BW RF signals with moderately high dynamic range. A 12b 10GS/s ADC with an input analog bandwidth of 7.4GHz is developed for such applications in 28nm CMOS. The ADC achieves an SNR of 56dB, SNDR of 55dB and SFDR of 64dB with a 4GHz input at 10GS/s, and realizes an NSD of −157dBFS/Hz (i.e. DR = 60dB) while dissipating 2.9W.

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关键词

analogue-digital conversion,interleaved pipeline ADC,CMOS technology,software defined radios,wideband instrumentation,wide BW RF signals,analog bandwidth,bandwidth 7.4 GHz,size 28 nm,frequency 4 GHz,power 2.9 W

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