Extending Gem5-Garnet For Efficient And Accurate Trace-Driven Noc Simulation

Cycle-accurate full-system simulators, such as Gem5, are indispensable for advanced architecture designs. However, as the complexity of the system architectures rises, exploiting the design space with such simulators is becoming very time-consuming. A viable alternative is to separate the system component of interest, e.g. the network-on-chip (NoC), from the simulator and use a trace-driven approach to the component simulator. Although trace-driven simulation allows fast evaluation of design alternatives, the performance accuracy will often be sacrificed. To overcome the problem, techniques based on dependence-aware traces have been proposed. However, a considerable time and storage space is required to accurately identify and capture the dependence information between simulated events. A possible solution is to generate approximate dependences on-the-fly during simulation. In this paper, we study the effectiveness of a trace-based simulation technique based on the NoC simulator of Germ5, Garnet, that exploits and approximates trace dependencies during simulation to produce accurate performance results. We modify Garnet to be dependency-aware and use Gem5 as the ground truth for comparison. Based on our evaluations, the dependency-aware Garnet can keep the performance differences within 3.22%, while a trace-based Garnet may result in errors as high as 14.97%.