Unbiased Finite-Memory Digital Phase-Locked Loop.
IEEE Transactions on Circuits and Systems II: Express Briefs(2016)
摘要
Digital phase-locked loops (DPLLs) have been commonly used to estimate phase information. However, they exhibit poor performance or, occasionally, a divergence phenomenon, if noise information is incorrect or if there are quantization effects. To overcome the weaknesses of existing DPLLs, we propose a new DPLL with a finite-memory structure called the unbiased finite-memory DPLL (UFMDPLL). The UFM...
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关键词
Phase locked loops,Estimation,Quantization (signal),Robustness,Circuits and systems,Timing,Manganese
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