Ultra Low Voltage Synthesizable Memories: A Trade-Off Discussion in 65 nm CMOS.

Oskar Andersson,Babak Mohammadi,Pascal Meinerzhagen,Andreas Burg,Joachim Neves Rodrigues

IEEE Transactions on Circuits and Systems I: Regular Papers（2016）

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摘要

In this study, design considerations for ultra low voltage (ULV) standard-cell based memories (SCM) are presented. Trade-offs for area cost, leakage power, access time, and access energy are discussed and realized using different read logic styles, latch architecture designs, and process options. Furthermore, deployment of multiple threshold voltages (Vth) options in a single standard-cell/bitcell...

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关键词

Transistors,Logic gates,Latches,Random access memory,Multiplexing,Power demand,Low voltage

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