An exact measurement and repair circuit of TSV connections for 128GB/s high-bandwidth memory(HBM) stacked DRAM

VLSIC(2014)

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摘要
For the heterogeneous-structured high bandwidth memory (HBM) DRAM, it is important to guarantee the reliability of TSV connections. An exact TSV current scan and repair method is proposed, that uses similar to the correlated double sampling method. The register-based pre-repair method improves testability. The measurement results for thousands of TSV shows impedance distribution under 0.1 ohm. Methods are integrated in 8Gb HBM stacked DRAM using 29nm process.
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关键词
DRAM chips,integrated circuit reliability,integrated circuit testing,sampling methods,three-dimensional integrated circuits,HBM stacked DRAM,TSV connections,bit rate 128 Gbit/s,correlated double sampling method,exact current scan,exact measurement,heterogeneous-structured high bandwidth memory,impedance distribution,register-based pre-repair method,repair circuit,size 29 nm,testability improvement,
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