A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition.

Guanghua Shu,Woo-Seok Choi,Saurabh Saxena,Mrunmay Talegaonkar,Tejasvi Anand,Ahmed Elkholy,Amr Elshazly,Pavan Kumar Hanumolu

IEEE Journal of Solid-State Circuits（2016）

引用 78|浏览83

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摘要

A continuous-rate digital clock and data recovery (CDR) with automatic frequency acquisition is presented. The proposed automatic frequency acquisition scheme implemented using a conventional bang-bang phase detector (BBPD) requires minimum additional hardware, is immune to input data transition density, and is applicable to subrate CDRs. A ring-oscillator-based two-stage fractional-N phase-locked...

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关键词

Jitter,Oscillators,Automatic frequency control,Detectors,Phase locked loops,Frequency locked loops

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