A 1.7 GHz Fractional-N Frequency Synthesizer Based on a Multiplying Delay-Locked Loop

Although multiplying delay-locked loops allow clock frequency multiplication with very low phase noise and jitter, their application has been so far limited to integer-N multiplication, and the achieved reference-spur performance has been typically limited by time offsets. This paper presents the first published multiplying delay-locked loop achieving fine fractional-N frequency resolution, and in...