4K Real-Time HEVC Decoder on an FPGA
IEEE Transactions on Circuits and Systems for Video Technology(2016)
摘要
With the popularization of a quad high-definition/4K video being dependent on the availability of real-time High Efficiency Video Coding (HEVC) decoders, hardware implementations have become more appealing due to their superior performance and low power consumption. In this paper, a field-programmable gate array (FPGA)-based hardware implementation of a 4K 30 frames/s real-time HEVC decoder is pre...
更多查看译文
关键词
Decoding,Field programmable gate arrays,Computer architecture,Pipeline processing,Transforms,Hardware,Throughput
AI 理解论文
溯源树
样例
![](https://originalfileserver.aminer.cn/sys/aminer/pubs/mrt_preview.jpeg)
生成溯源树,研究论文发展脉络