A Holistic Analysis of Circuit Performance Variations in 3-D ICs With Thermal and TSV-Induced Stress Considerations

In 3-D ICs, through silicon via (TSV)-induced thermal residual stress impacts several transistor electrical parameters-low-field mobility, saturation velocity, and threshold voltage. These thermal-stress related shifts are coupled with other temperature effects on transistor parameters that are seen even in the absence of TSVs. In this paper, analytical models are developed to holistically represe...