A 12.5-ENOB 10-kS/s Redundant SAR ADC in 65-nm CMOS.
IEEE Transactions on Circuits and Systems II: Express Briefs(2016)
摘要
This brief describes a 14-b 10-kS/s successive approximation register analog-to-digital converter (ADC) for biomedical applications. In order to achieve enhanced linearity, a uniform-geometry nonbinary-weighted capacitive digital-to-analog converter is implemented. In addition, a secondary-bit approach to dynamically shift decision levels for error correction is employed. To reduce the power consu...
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关键词
Latches,Capacitors,Noise,Redundancy,Arrays,CMOS integrated circuits,Linearity
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