High performance a‐IGZO thin‐film transistors with mf‐PVD SiO2 as an etch‐stop‐layer

In this work, we report on high-performance bottom-gate top-contact (BGTC) amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistor (TFT) with SiO2 as an etch-stop-layer (ESL) deposited bymediumfrequency physical vapor deposition (mf-PVD). The TFTs show field-effect mobility (FE) of 16.0cm(2)/(V.s), sub-threshold slope (SS-1) of 0.23 V/decade and off-currents (I-OFF) <1.0 pA. The TFTs with mf-PVD SiO2 ESL deposited at room temperature were compared with TFTs made with the conventional plasma-enhanced chemical vapor deposition (PECVD) SiO2 ESL deposited at 300 degrees C and at 200 degrees C. The TFTs with different ESLs showed a comparable performance regarding FE, SS-1, and I-OFF, however, significant differences were measured in gate bias-stress stability when stressed under a gate field of +/-1 MV/cm for duration of 10(4) s. The TFTs with mf-PVD SiO2 ESL showed lower threshold-voltage (VTH) shifts compared with TFTs with 300 degrees C PECVD SiO2 ESL and TFTs with 200 degrees C PECVD SiO2 ESL. We associate the improved bias-stress stability of the mf-PVD SiO2 ESL TFTs to the low hydrogen content of the mf-PVD SiO2 layer, which has been verified by Rutherford-Back-Scattering-Elastic-Recoil-Detection technique.