evercodeML: A formal language for SoC integration

2015 Electronic System Level Synthesis Conference (ESLsyn)(2015)

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摘要
Complex SoC design devote a great part of the developing time to module integration tasks. The necessity of automating system integration at high-level has yield to the development of module description languages like IP-XACT. However, the available options today still lack advanced parametrization capabilities needed to design complex systems with very heterogeneous IP-cores and module providers. This contribution introduces a formal language for SoC integration that overcomes these limitations.
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关键词
FPGA,SoC,IP-core,IP-XACT
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