A 45nm SOI-CMOS PLL with a wideband LC-VCO

Midwest Symposium on Circuits and Systems Conference Proceedings(2011)

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摘要
A 45nm SOI-CMOS PLL with a wideband LC-VCO is presented. The proposed PLL uses the advantage of SOI technology such as small parasitic capacitance and high Q-factor. The frequency range of the PLL is maximized because of a high maximum-to-minimum capacitance ratio of a capacitor bank. Measurement results show that the VCO generates 4.87-to-9.65GHz frequency signals with 65.8% frequency coverage. Fabricated chip occupies 0.09mm2 of active area and consumes less than 7mA current from single 1.0V supply.
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关键词
cmos integrated circuits,chip,q factor,silicon on insulator,phase locked loops
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