A 64–84-GHz PLL With Low Phase Noise in an 80-GHz SiGe HBT Technology
Microwave Theory and Techniques, IEEE Transactions（2012）
摘要
This paper presents a 64-84-GHz phase-locked loop (PLL) realized in a low-cost 80-GHz HBT technology. The circuit consists of a wide tuning-range voltage-controlled oscillator, a push-push frequency doubler, a divide-by-32 frequency divider, a phase detector and an active loop filter. The measured phase noise at 1-MHz offset is -106 dBc/Hz. The output power is -2.5 dBm at 64 GHz, and it slowly decreases to -8.1 dBm at 84 GHz, with a maximum dc power consumption of 517 mW. To the authors' knowledge, the circuit achieves the widest frequency tuning range and its in-band phase noise is the lowest among the fully integrated V/W-band PLLs reported to date.
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关键词
ge-si alloys,active filters,circuit tuning,frequency dividers,heterojunction bipolar transistors,phase detectors,phase locked loops,phase noise,power consumption,voltage-controlled oscillators,pll,sige,active loop filter,dc power consumption,divide-by-32 frequency divider,frequency 1 mhz,frequency 64 ghz to 84 ghz,frequency tuning,in-band phase noise,low phase noise,low-cost hbt technology,measured phase noise,phase detector,phase-locked loop,power 517 mw,push-push frequency doubler,wide tuning-range voltage-controlled oscillator,heterojunction bipolar transistors (hbts),millimeter-wave (mm-wave) integrated circuits (ics),phase-locked loops (plls)
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