Read and write circuit assist techniques for improving Vccmin of dense 6T SRAM cell

Muhammad M Khellah,Ali Keshavarzi,Dinesh Somasekhar,Tanay Karnik,Vivek De

Austin, TX（2008）

引用 62|浏览4

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摘要

We review circuit techniques aimed at improving read and write stability of the smallest 6T SRAM cell typically used in microprocessorpsilas Last Level cache (LLC). We qualitatively compare three main approaches and give a designerpsilas perspective on the pros and cons of the different schemes.

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关键词

sram chips,cache storage,circuit stability,dense 6t sram cell,last level cache,microprocessor,read and write circuit,read and write stability,circuits,decision support systems

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