A field programmable accelerator for compiled-code applications
Cambridge, MA（1993）
摘要
Describes a special-purpose application accelerator using field-programmable gate arrays to accelerate a range of applications. The accelerator is designed to support applications by allowing the user to implement a processor with an instruction set designed for the specific application being accelerated, using specialized instructions to implement critical fragments of the application. A compiled-code software organization is used to reduce overhead operations. A prototype has been built, and the first application to be ported to it, logic simulation, is underway
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关键词
instruction set,critical fragments,field-programmable gate arrays,logic simulation,logic cad,programmable logic arrays,r-3000 code,specialized instructions,circuit analysis computing,logic arrays,reconfigurable architectures,xilinx 4005,overhead operations,special-purpose application accelerator,compiled-code applications,compiled-code software organization,fpga,instruction sets,field programmable gate arrays,field programmable accelerator,special purpose application accelerator,program compilers,data structures,writing,hardware,acceleration,logic gates
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