Electrical measurement and analysis of TSV/RDL for 3D integration

Proceedings of the 16th Electronics Packaging Technology Conference, EPTC 2014(2014)

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摘要
In this paper, electrical measurement and analysis of TSV/RDL is carried out, to evaluate the fabrication process and get a comprehensive understanding of electrical properties of TSV/RDL interconnect structures. DC resistance, leakage current and high frequency characterization are implemented. TSV shows a spreading distribution of DC resistance, with minimum of 4.3 mΩ. Leakage current of TSV reaches 150nA up to 30V without breakdown. Low substrate resistivity lowers the high frequency performance of TSV. © 2014 IEEE.
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关键词
electric resistance measurement,integrated circuit interconnections,integrated circuit packaging,leakage currents,three-dimensional integrated circuits,3D integration,DC resistance,TSV/RDL interconnect structures,electrical measurement,high frequency characterization,leakage current,redistribution layers,substrate resistivity,through silicon via technology,
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