Microbank: Architecting Through-Silicon Interposer-Based Main Memory Systems

Through-Silicon Interposer (TSI) has recently been proposed to provide high memory bandwidth and improve energy efficiency of the main memory system. However, the impact of TSI on main memory system architecture has not been well explored. While TSI improves the I/O energy efficiency, we show that it results in an unbalanced memory system design in terms of energy efficiency as the core DRAM dominates overall energy consumption. To balance and enhance the energy efficiency of a TSI-based memory system, we propose mu bank, a novel DRAM device organization in which each bank is partitioned into multiple smaller banks (or mu banks) that operate independently like conventional banks with minimal area overhead. The mu bank organization significantly increases the amount of bank-level parallelism to improve the performance and energy efficiency of the TSI-based memory system. The massive number of mu banks reduces bank conflicts, hence simplifying the memory system design. We evaluated a sophisticated prediction-based DRAM page-management policy, which can improve performance by up to 20.5% in a conventional memory system without mu banks. However, a mu bank-based design does not require such a complex page-management policy and a simple open-page policy is often sufficient - achieving within 5% of a perfect predictor. Our proposed mu bank-based memory system improves the IPC and system energy-delay product by 1.62x and 4.80x, respectively, for memory-intensive SPEC 2006 benchmarks on average, over the baseline DDR3-based memory system.