Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(2016)

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摘要
Adders are the most fundamental arithmetic units, and often on the timing critical paths of microprocessors. Among various adder configurations, parallel prefix adders provide the best performance vs. power/area trade-off, especially for higher bit-widths. With aggressive technology scaling, the performance of a parallel prefix adder, in addition to the dependence on the logic-level, is determined...
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关键词
Adders,Algorithm design and analysis,Indexes,Complexity theory,Timing,Routing,Cloning
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