Multi-Slew-Rate Output Driver and Optimized Impedance-Calibration Circuit for 66nm 3.0Gb/s/pin DRAM Interface.Dong-Uk Lee,Shin-Deok Kang,Nak-Kyu Park,Hyun-Woo Lee,Young-Kyoung Choi,Jung-Woo Lee,Seung-Wook Kwack, Hyeong Ouk Lee,Won-Joo Yun,Sang-Hoon Shin,Kwan-Weon Kim,Young-Jung Choi,Ye Seok YangISSCC(2008)引用 13|浏览41暂无评分关键词data transferAI 理解论文溯源树样例生成溯源树,研究论文发展脉络Chat Paper正在生成论文摘要