Massively Distributed Digital Implementation of a Spiking Neural Network for Image Segmentation on FPGA

Numerous neural network hardware implementations now use digital reconfigurable devices such as Field Programmable Gate Arrays (FPGAs) thanks to an interesting compromise between the hardware efficiency of Application Specific Integrated Circuits (ASICs) and the flexibility of a simple software-like handling. Another current trend of neural research focuses on elementary neural mechanisms such as spiking neurons. Their rather simple and asynchronous behavior have motivated several implementations on analog devices, whereas digital implementations appear as quite unable to handle large spiking neural networks, for lack of density. In this paper, we develop an optimized FPGA implementation of a standard spiking model (LEGION) of integrate-and-fire neurons, used for image sequence segmentation. Despite previous research, little progress has been made in building successful neural systems for image segmentation in digital hardware. This work shows that digital and flexible solutions may efficiently handle large networks of spiking neurons.