A Super-Polynomial Lower Bound For Regular Arithmetic Formulas

STOC(2014)

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摘要
We consider arithmetic formulas consisting of alternating layers of addition (+) and multiplication ( x) gates such that the fanin of all the gates in any fixed layer is the same. Such a formula (I) which additionally has the property that its formal/syntactic degree is at most twice the (total) degree of its output polynomial, we refer to as a regular formula. As usual, we allow arbitrary constants from the underlying field F on the incoming edges to a + gate so that a + gate can in fact compute an arbitrary 1F-linear combination of its inputs. We show that there is an (n2 + 1)-variate polynomial of degree 2n in VNP such that any regular formula computing it must be of size at least nc1(1'g Along the way, we examine depth four regular formulas wherein all multiplication gates in the layer adjacent to the inputs have fanin a and all multiplication gates in the layer adjacent to the output node have fanin b. We refer to such formulas as 1-1[b] 1-1[``1-formulas. We show that there exists an n2-variate polynomial of degree n in VNP such that any 11[ (1/T1)11111711-formula computing it must have top fan-in at least 2c1(1/1 In comparison, Tavenas [Tav13] has recently shown that every n (1)-variate polynomial of degree n in VP admits a 11[0(1/1)1111/T11-formula of top fan-in 2 (1/T1 l'g This means that any further asymptotic improvement in our lower bound for such formulas (to say 2 '(1/1'") will imply that VP is different from VNP.
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arithmetic circuits,depth-4 circuits,VP,VNP,lower bounds
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