Advanced Multithreading Architecture with Hardware Based Scheduling
Field Programmable Logic and Applications（2010）
摘要
FPGA based soft-processors are an attractive approach for embedded system engineering. Multithreading is proposed as the method to manage long latency events that are caused by I/O, off-chip memory and other shared resource accesses. However, most of the earlier multi-threaded soft-processors were based on conventional FPMT and CGMT architectures, which fall short for several reasons. In this paper, we propose a novel multithreading architecture for soft-processors that eliminates the thread switch penalty, while maintaining the single thread performance.
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关键词
microcomputers,long latency event,processor scheduling,hardware based thread scheduling,embedded system engineering,soft-processor,thread switch penalty,multi-threading,multi-threaded soft-processors,fpga based soft processors,resource allocation,attractive approach,single thread performance,shared resource access,fpga,multithreading architecture,cgmt architecture,off-chip memory,multithreaded soft-processors,advanced multithreading architecture,embedded systems,field programmable gate arrays,fgmt architecture,conventional fpmt,chip,hazards,instruction sets,switches,embedded system,multithreading,multi threading,pipelines
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