Integer code generation for the TI TMS320C62X

This paper presents a methodology which enables the generation of C62/spl times/ optimized fixed-point C-code from a floating-point description of an algorithm. The FRIDGE design environment transforms floating-point ANSI-C code with local fixed-point annotations into an internal bit-true representation. From this representation we generate C62/spl times/ optimized integer C code utilizing the code transformation techniques illustrated in this paper. A benchmark is presented comparing the efficiency of the generated code with C67/spl times/ C-code, C62/spl times/ floating-point emulation and generic integer ANSI-C code.